Study: A scanlet for testing and updating designs intended for the verification of fuzzy logic controllers

Authors

  • Luis Córdova Sosa Facultad de Ingeniería Eléctrica y Eléctronica, Universidad Nacional de Ingeniería, Lima, Perú
  • José Paz Campaña Facultad de Ingeniería Eléctrica y Eléctronica, Universidad Nacional de Ingeniería, Lima, Perú
  • Jorge Egoávil Retamozo Facultad de Ingeniería Eléctrica y Eléctronica, Universidad Nacional de Ingeniería, Lima, Perú

DOI:

https://doi.org/10.21754/tecnia.v10i2.466

Keywords:

Scanlet, ATPG, JAVA API for Boundary-Scan, Fuzzy Logic, Functional Verification

Abstract

This article presents preliminary work on the implementation of a Scanlet for: (a) automatic checking of pattern generation related to digital circuits based on a
model with interruption in the presence of failure, (b) in situ monitoring and debugging, (c) update of
the architecture of a fuzzy logic controller, and (d) pin-level fault injection using Java
API. Points (a)-(c) are verification tasks. As a first approximation, the STUD system has been developed using the (built-in) JTAG (Joint Test Action Group) architecture and configured by a CPLD for testing and programming operations. Meanwhile, the operations are executed by Scanlet, which can be run from an Internet page. Finally, a fuzzy logic controller, like an IP core, is used as a trademark.

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References

[1] . Córdova Luis, Egoávil Jorge. Controlador Difuso Realizado en un FPGA: Aplicación. VI Iberchip Workshop, Pages. 300-305, Sao Paulo-Brasil, 2000.

[2] . Nuñez C.; Rojas A., Córdova L. Diseño e Implementación de un Controlador Difuso TSK Utilizando Sintonía ANFIS. Aplicación: Péndulo

Invertido. III Jornada Iberoamericana de Inteligencia Artificial en Sistemas Eléctricos JIASE, Vol.N°03, Pages.734-740, Lima-Peru, 1999.

[3]. Córdova L., Egoávil, J., Salazar R., Escudero M. FuzzyChip. Intercon'99 Memoria de Concurso de Proyectos, Lima-Peru, 1999.

[4]. Córdova L., "Design of Fault-Tolerant Circuits Hardening Memory Elements in VHDL, Design Automation Conference 2000, June 5~9,

Los Angeles, CA, USA.

[5] . EETIMES, Signals, "Cell Phone Challenges Designers", June 5, 2000.

[6] . Córdova L. Intelligent Microelectronics Systems Group. http://207. 17.220.225/ins/index.html, 2000.

[7] . Xilinx, Inc. http://support.xilinx.com/apps/ fpga.htm

[8] . Xess Corp. http:l/www.xess. com/prod002. html

[9] . ModelSim, Inc. www.model.com & Innoveda www.innoveda.com

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Published

2000-12-01

How to Cite

[1]
L. Córdova Sosa, J. Paz Campaña, and J. Egoávil Retamozo, “Study: A scanlet for testing and updating designs intended for the verification of fuzzy logic controllers”, TEC, vol. 10, no. 2, Dec. 2000.

Issue

Vol. 10 No. 2 (2000)

Section

Articles

License

Copyright (c) 2000 TECNIA

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