MORALES VILLANUEVA, Aurelio; BRICEÑO ARANDA, Cesar. Design and implementation of a neural network in an FPGA for pattern recovery. TECNIA, [S. l.], v. 17, n. 2, p. 1–12, 2007. DOI: 10.21754/tecnia.v17i2.367. Disponível em: https://www.revistas.uni.edu.pe/index.php/tecnia/article/view/367. Acesso em: 19 may. 2024.